This invention relates to a semiconductor device and also to a manufacturing technique thereof, and more particularly, to a technique effective for application to a semiconductor device using a silicide film.
Since electrically rewritable, non-volatile memory devices such as EEPROM (Electrically Erasable Programmable Read Only Memory), a flash memory and the like are able to execute onboard rewriting of program, their applications are now spreading to a diversity of uses such as of high mix low volume manufacturing services, tuning for destination classification, update of program after shipment and the like, aside from the reduction of development period and the possibility of improving a developing efficiency. Especially, in recent years, there is a need for microcomputers building MPU (micro processing unit) and EEPROM (or a flash memory) thereinto.
For the microfabrication and high-speed operation of such microcomputers, a salicide (self-aligned silicide) technology has been applied to. For instance, in order to realize a low resistance, as a contact, of a silicon surface of an electrode or diffusion layer of MISFET (Metal Insulator Semiconductor Field Effect Transistor, which is hereinafter referred to simply as MIS transistor), the salicide technique is applied to the silicon surface to form a silicide film thereon.
In IEEE Trans. Electron Devices, entitled “Direct silicidation of CO on Si by rapid thermal annealing”, vol. ED-34, p. 548, 1987, M. Tabasky, E. S. Bulat, B. M. Ditchek, M. A. Sullivan, and S. C. Shatas have reported a technique wherein using RTA (rapid thermal anneal) for silicidation anneal, a cobalt (Co) film on polysilicon or a diffusion layer is silicidated into CoSi2 of a low sheet resistance.
In Japanese Unexamined Patent Publication No. Hei 11 (1999)-283935, there is disclosed a technique wherein a cobalt film is deposited on the surface of a diffusion layer and subjected to first annealing, and an unreacted cobalt film is subsequently removed, after which second annealing is carried out to form a CoSi2 film.
In Japanese Unexamined Patent Publication No. 2004-193447, a technique is disclosed wherein a cobalt film is deposited on the surface of a diffusion layer and subjected to first annealing and further to second annealing, after which an unreacted cobalt film is removed, followed by third annealing to form a CoSi2 film.
Japanese Unexamined Patent Publication No. 2001-203352 discloses a technique wherein a cobalt film is deposited on the surface of a diffusion layer and subjected to first annealing, and an unreacted cobalt film is oxidized and the resulting cobalt oxide film is removed, after which second annealing is carried out to form a CoSi2 film.
In Japanese Unexamined Patent Publication No. 2002-231829, a technique is disclosed wherein a non-volatile memory having a memory gate and a control gate is deposited with a CoSi2 film on upper portions of both gates.